IBM unveils technology for chips it says pack performance leap and use much less power

IBM on Thursday unveiled semiconductor technology it claims can deliver chips with 50 percent better performance while using dramatically less power — a breakthrough that could reshape the computing landscape within five years if the company can translate lab results into mass production.

The technology, developed at IBM's research facilities, uses a novel three-dimensional architecture called "nanostack" that stacks transistor layers vertically rather than arranging them in a single flat plane. The result: nearly 100 billion transistors packed onto a chip the size of a fingernail, roughly double the density of today's most advanced 2-nanometer chips.

**Why this matters beyond the lab**

The semiconductor industry has been racing against the limits of physics. Taiwan's TSMC, the world's dominant chip manufacturer, recently began mass-producing 2-nanometer chips — the current cutting edge. IBM's new 0.7-nanometer technology represents a generational leap beyond that, pushing transistor density to a scale measured in atoms rather than nanometers.

For context, "nanometer" in chip manufacturing doesn't refer to a literal physical measurement anymore. It's an industry convention describing transistor density. The smaller the number, the more transistors fit on a chip. More transistors mean faster processing, lower power consumption, and more capability packed into the same physical space.

The practical implications touch nearly every sector. Faster smartphones with longer battery life. More efficient data centers that don't require the equivalent of a small city's power grid. Self-driving cars that can process sensor data in real time without overheating. AI systems like ChatGPT that could run faster and cheaper, making advanced artificial intelligence more accessible.

**The energy problem this helps solve**

Data centers worldwide are consuming electricity at an accelerating rate, driven largely by the computational demands of training and running large AI models. Local communities increasingly push back against new data center construction, citing strain on power grids and water supplies.

IBM's claim of 70 percent greater energy efficiency compared to its 2-nanometer chips addresses this directly. If the technology scales, it could mean data centers that do more work per watt — a metric that matters not just for corporate utility bills but for the environmental footprint of the entire technology sector.

The company also reported a 40 percent improvement in SRAM memory chips, which serve as a processor's short-term memory in everything from gaming consoles to laptops. This is notable because SRAM scaling has stalled in recent years — IBM's vice president of semiconductors, Huiming Bu, called it "something that we haven't seen in decades."

**The hard part: getting from lab to fab**

IBM does not manufacture its own chips. It licenses designs to partners like Japan's Rapidus, which is working with IBM to scale 2-nanometer production. The company says it sees "a path to production in as early as the next five years," but the gap between a research demonstration and mass manufacturing is where many promising technologies die.

Producing chips at this scale requires extreme ultraviolet lithography machines made by ASML — the only company in the world that builds them — at a cost of hundreds of millions of dollars each. It requires clean rooms more sterile than operating theaters. It requires billions of dollars in capital investment and years of engineering refinement.

TSMC, meanwhile, is not standing still. The company is developing 1.4-nanometer technology targeted for mass production around 2028. Samsung and Intel are also racing to advance their own processes. IBM's breakthrough adds a new competitor to a field that was already moving fast.

**What this means for you**

If you're a technology investor, IBM's announcement is a long-term signal, not a near-term catalyst. The company's semiconductor research division consistently pushes boundaries, but commercialization timelines are uncertain. Watch for licensing deals and manufacturing partnerships as more concrete indicators.

If you work in data center operations or enterprise IT, the energy-efficiency gains IBM describes could be transformative — but not before 2030 at the earliest. Plan your infrastructure roadmaps accordingly and don't defer necessary upgrades waiting for technology that's still in the lab.

If you're a consumer, this is ultimately good news for your devices. More powerful chips that use less power mean better phones, longer battery life, and faster computing — but the benefits are years away. The next-generation devices you'll buy in 2027 and 2028 will run on 2-nanometer or 1.4-nanometer chips from TSMC and Samsung. IBM's nanostack technology, if it reaches production, will power the generation after that.

The broader takeaway: computing is not running into a wall. Despite years of predictions that Moore's Law is dead, researchers keep finding new architectures — stacking transistors vertically, designing new materials, rethinking chip geometry — to extend the curve. The pace may slow, but the direction hasn't reversed.